This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-337342, filed Nov. 29, 1999, the entire contents of which are incorporated herein by reference.
This invention relates to a semiconductor device of a CSP (Chip Size Package) structure, and a process for manufacturing the device.
To accelerate downsizing and thinning of electronic devices, a semiconductor device of a CSP (Chip Size Package) structure, in which the chip and the package have substantially the same size, has recently been used.
FIG. 11A is a sectional view illustrating an essential part of an example of such a conventional semiconductor device. FIG. 11B is a sectional view taken along line 11Bxe2x80x9411B of FIG. 11A, illustrating a structure not including a wiring pattern 6, and a sealing film 8 and projection electrodes 7 formed on the wiring pattern 6.
This semiconductor device comprises a semiconductor substrate 1 formed of, for example, a silicon substrate. The semiconductor substrate 1 is flat and square-shaped, and has a central circuit element forming area 2 indicated by the one-dotted chain line, as is shown in FIG. 11B. If the semiconductor device is an LSI for driving a liquid crystal display panel, multiple circuit elements such as an oscillation circuit, a regulator circuit, a liquid crystal driver circuit, etc., which are not shown, are provided in the circuit element forming area 2.
A plurality of connection pads 3 are provided on the upper surface of the semiconductor substrate 1 outside the circuit element forming area 2. The connection pads 3 are formed of end portions of wirings 3a provided on the upper surface of the semiconductor substrate 1, and are hence connected to the circuits, such as the liquid crystal driver circuit, in the circuit element area 2. An insulating film 4 made of, for example, silicon oxide is provided on the upper surface of the semiconductor substrate 1 except for on central portions of the connection pads 3. In other words, openings 5 are formed in the insulating film 4, thereby exposing the central portions of the connection pads 3 therethrough. The wiring patterns 6 are provided on the exposed upper surfaces of the connection pads 3 and on the upper surface of the insulating film 4 located inside the connection pads 3. The wiring patterns 6 are provided to connect the connection pads 3 to the projection electrodes 7, and to appropriately locate the projection electrodes 7 on the circuit element forming area 2. The projection electrodes 7 are formed of, for example, columnar electrodes and provided on the upper surfaces of pad portions as end portions of the wiring pattern 6. The sealing film 8 made of, for example, epoxy resin is provided on the entire upper surface of the semiconductor substrate 1 except for on the projection electrodes 7. When mounting the above-described semiconductor device onto another circuit board, a mounting technique called xe2x80x9cfacedown bondingxe2x80x9d, not shown, is used. For example, solder balls (not shown) are formed on the respective projection electrodes 7, thereby electrically connecting the electrodes to, for example, another circuit board.
In the conventional semiconductor device, the wiring pattern 6 is simply provided on the upper surface of the insulating film 4. Therefore, the device is not protected from electromagnetic noise generated in the circuit element forming area 2 or entering it from the outside. Since, as described above, the semiconductor device is mounted by facedown bonding, it is possible that electromagnetic noise generated in the circuit element forming area 2 will easily leak to the outside of the device, thereby adversely affecting the operation of an external circuit, or that electromagnetic noise from the outside will easily enter, for example, a liquid crystal driver circuit provided in the circuit element forming area 2, thereby causing the device to operate erroneously.
It is the object of the invention to provide a semiconductor device of a CSP structure obtained by forming projection electrodes for connecting the semiconductor device to another circuit board on a plurality of circuit element forming areas of a semiconductor wafer, and then dividing the wafer into chips, the semiconductor device preventing noise generated in the circuit element forming area from easily leaking to the outside, and being sufficiently protected from the influence of external electromagnetic noise.
To attain the object, there is provided a semiconductor device according to one aspect of the invention, which incorporates a circuit element forming area as a central area, and a plurality of connection pads for signal transmission and a connection pad connected to the ground potential of the circuit element provided around the circuit element forming area, wiring pattern connected to the connection pads being provided on the upper surface of an insulating film formed on the circuit element forming area, a conductive layer connected to the connection pad connected to the ground potential being provided on the insulating film except for on the wiring pattern and on areas near the wiring pattern, and projection electrodes being provided on the wiring pattern and the conductive layer. Since, in this structure, a greater part of the circuit element forming area except for the wiring pattern and the areas near it is covered with the conductive layer, leakage of electromagnetic noise generated in the circuit element forming area can be suppressed, and the influence of external electromagnetic noise can be reduced. Moreover, the spread of an electric field near the wiring pattern for signal transmission can be suppressed, thereby increasing the signal transmission speed, and reducing cross talk between adjacent sections of the wiring pattern for signal transmission.
To attain the object, there is provided a semiconductor device according to another aspect of the invention, which incorporates, as in the above structure, a conductive layer provided on the insulating film in the circuit element forming area except for on the wiring pattern and on areas near the wiring pattern, and a thin film circuit element, such as a induction element or a capacitor element, provided at the same layer or below the conductive layer. Also in this structure, a greater part of the circuit element forming area is covered with the conductive layer. Accordingly, this structure provides, in addition to the aforementioned advantage, the advantage that the function of the semiconductor device can be enhanced with its size almost unchanged, or can be made compact with its function unchanged.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.